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Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs

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Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
Design and evaluation of energy-efficient carbon nanotube FET-based quaternary minimum and maximum circuits
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
PDF) A novel, efficient CNTFET Galois design as a basic ternary-valued logic field
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
GNRFET- and CNTFET-Based Designs of Highly Efficient 22 T Unbalanced Single-Trit Ternary Multiplier Cell
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
Micromachines, Free Full-Text
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
A universal method for designing low‐power carbon nanotube FET‐based multiple‐valued logic circuits - Moaiyeri - 2013 - IET Computers & Digital Techniques - Wiley Online Library
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
Previous work TMUX with 15 CNTFETs.
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
Fault Tolerance in Carbon Nanotube Transistors Based Multi Valued Logic
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
PDF) Efficient CNTFET-based design of quaternary logic gates and arithmetic circuits
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
5. CNTFET-based design of ternary.pdf
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
A universal method for designing low‐power carbon nanotube FET‐based multiple‐valued logic circuits - Moaiyeri - 2013 - IET Computers & Digital Techniques - Wiley Online Library
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
Design of Area Optimised, Energy Efficient Quaternary Circuits Using CNTFETs
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
Energy Efficient Full Adder Cell Design with Using Carbon Nanotube Field Effect Transistors in 32 Nanometer Technology
Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
Design and evaluation of energy-efficient carbon nanotube FET-based quaternary minimum and maximum circuits
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